The present invention relates to a silicon wafer having a grown-in defect density lower than that of conventional epitaxial wafers, annealed wafers and wafers having an N-region for entire plane, a method for determining production conditions of the same and a method for producing the same. The present invention further relates to a method for determining production conditions of a silicon single crystal that is for stable production of silicon wafers of low grown-in defect density, which-wafers are produced by subjecting silicon wafers produced from a nitrogen-doped silicon single crystal to heat treatment, and a method for producing the same.
In recent years, in connection with use of finer circuit elements accompanying the use of higher integration degree of semiconductor circuits, the demand for quality of silicon single crystals produced by the CZ method, from which substrates of the circuit are produced, has become higher. In particular, there are defects generated during the crystal growth, which are called grown-in defects including FPD (Flow Pattern Defect), LSTD (Laser Scattering Tomography Defect), COP (Crystal Originated Particle) and so forth, and degrade oxide dielectric breakdown voltage characteristics, device characteristics and so forth, and reduction of them has been considered important.
Therefore, there have been developed several kinds of wafers produced form of crystals having few grown-in -defects, including epitaxial wafer consisting a usual silicon wafer on which a silicon layer is newly provided by epitaxial growth, annealed wafers which is produced by subjecting wafers to heat treatments at a high temperature in hydrogen or argon atmospheres, wafers having an N-region (a region free from dislocation clusters existing outside the QSF ring) for entire plane which are produced by improving the growth conditions of CZxe2x80x94Si single crystals and so forth.
In addition, it is required to impart gettering ability to such wafers in order to eliminate contamination by impurities introduced during the device production process. To answer to this requirement, there have been also developed wafers imparted with the IG (Intrinsic Gettering) effect by using additional heat treatment, or doping impurities such as nitrogen or carbon to accelerate oxygen precipitation in bulk portions.
Among these, the wafers obtained by annealing nitrogen-doped wafers (referred to as xe2x80x9cnitrogen-doped annealed wafersxe2x80x9d hereinafter) are extremely useful as wafers showing reduced grown-in defects in wafer surface layer portions and high density of BMD (Bulk Micro Defect) in bulk portions. These are wafers developed by utilizing the defect agglomeration inhibition effect and the oxygen precipitation promotion effect of nitrogen doping, and since they have a smaller defect size compared with usual crystals, they show good efficiency for eliminating the defects in surface layers by annealing and they are wafers of effective gettering ability also showing a high BMD density in bulk portions.
However, if a highly precise defect evaluation apparatus such as MO-601 (produced by Mitsui Mining and Smelting Co., Ltd.) is used, it can be seen that these silicon wafers referred to with the term low defect also have defects, although their density is low. The apparatus MO-601 is a highly precise defect evaluation apparatus, which can measure even extremely fine defects having a size of about 50 nm, and also has a function enabling evaluation of defects along the depth direction for a depth of 5 xcexcm.
According to evaluation of defects having a size 50 nm or more (LSTD) for a depth of, for example, 5 xcexcm by using such a defect evaluation apparatus, it can be seen that there are defects in a density of about 40 number/6xe2x80x3 wafer (0.23 number/cm2) in usual epitaxial wafers and nitrogen-doped wafers undergone epitaxial growth, about 3000 number/6xe2x80x3 wafer (17 number/cm2) in annealed wafers, and about 70/6xe2x80x3 wafer (0.40 number/cm2) in wafers having an N-region for entire plane and nitrogen-doped wafers having an N-region for entire plane. Since these defects have an extremely small size, they do not cause any problem in many cases in the present device production process of the usual level. However, they are considered to inevitably cause a problem for the currently latest devices or devices expected to be produced in future.
Among these low defect wafers, the nitrogen-doped annealed wafers have the aforementioned useful effects, i.e., the grown-in defect agglomeration inhibition effect and the oxygen precipitation promotion effect, and in addition, they undergo the annealing process that eliminates defects, which is not used for epi-wafers or improved CZ wafers. Therefore, they are considered to have high potential as for reduction of grown-in defects in a considerable degree. However, the current nitrogen-doped annealed wafers shows significant fluctuation in the defect density for every production lot, and it was found that they contained defects at a level of at least about 140 number/6xe2x80x3 wafer (0.79 number/cm2) according to a measurement using the aforementioned MO-601. In order to further reduce these defects to stably produce wafers of low defect density, it is necessary to develop crystal growth conditions and annealing conditions in good balance.
Meanwhile, the nitrogen-doped CZ crystals, which are used as the raw material of nitrogen-doped annealed wafers, recently come to be actively studied, and researches about the grown-in defect agglomeration inhibition effect and the oxygen precipitation promotion effect have progressed. However, data have been scarcely obtained concerning if thermal history during the pulling of crystals affects on the formation of grown-in defects in nitrogen-doped crystals in a manner similar to that of non-nitrogen-doped crystals, or if it affects in a manner different much or less. Therefore, it is expected that, even though the annealing conditions are fixed, significant fluctuation of the detect elimination effect after the annealing would be observed, if the pulling conditions of nitrogen-doped crystals such as the thermal history during pulling of the crystals are changed.
In order to ameliorate such fluctuation, it is expected to employ an approach of eliminating more defects by annealing to obtain an extremely low defect density. However, it is not desirable to adopt such an approach because it requires costly annealing (annealing at high temperature for long time). Therefore, the defects should be controlled by the crystal pulling conditions. However, the crystal growth conditions have not been fully studied as described above, and claptrap development has been conducted so far, in which, for example, a crystal was pulled with some growth conditions, wafers are produced and annealed, and then it was confirmed if a necessary grown-in defect (mainly void defect) free region could be secured in the wafers. Thus, development cost might become high, and quality was not stabilized.
Further, since the thermal history also varies depending on the diameter of crystal, the annealing conditions may also be changed depending on it, and the crystal must be optimized for each annealing condition. However, sufficient researches have not been conducted also in this respect.
Therefore, the present invention was accomplished in view of the aforementioned problems, and its object is to produce a nitrogen-doped annealed wafer showing a low defect density and little fluctuation depending on production conditions by controlling grown-in defects in a nitrogen-doped crystal, which serves as a raw material of the nitrogen-doped annealed wafer.
Another object of the present invention is to provide a silicon wafer having extremely few surface defects in spite of not forming an epitaxial layer that invites increase of cost.
The present invention for achieving the aforementioned objects provides a silicon wafer, wherein an epitaxial layer is not formed on a surface, and LSTDs having a size of 50 nm or more existing in a surface layer portion are fewer than those existing in a surface layer portion of an epitaxial layer of a silicon epitaxial wafer.
The silicon wafer of the present invention can be a silicon wafer in which LSTDs existing in a surface layer portion are fewer than those existing in a surface layer portion of an epitaxial layer of an epitaxial wafer in spite of not forming an epitaxial layer on the surface, and it provides an advantage that it does not require any heat treatment for epitaxial growth that takes a long period of time.
In this case, the aforementioned surface layer portion may be a region having a depth of at least 5 xcexcm from the wafer surface.
Such a depth is defined because, if the surface layer portion containing extremely few defects consists of a region having a depth of at least 5 xcexcm from the wafer surface, it would be sufficient for producing, devices on the wafer surface.
The present invention also provides a silicon wafer, wherein an epitaxial layer is not formed on a surface, and number of LSTDs having a size of 50 nm or more existing in a surface layer portion is 0.23 number/cm2 or less.
The silicon wafer of the present invention can also be a silicon wafer containing few defects comparable to those of an epitaxial wafer or fewer defects than those of an epitaxial wafer in spite of not forming an epitaxial layer on the surface. Therefore, it does not require the epitaxial growth process, and thus productivity and cost of highly integrated devices are improved.
In this case, the aforementioned surface layer portion may be region having a depth of at least 5 xcexcm from the wafer surface, and the number of LSTDs having a size of 50 nm or more may be 0.06 number/cm2 or less.
Thus, the silicon wafer of the present invention can be a silicon wafer containing extremely fewer defects compared with even an epitaxial wafer, which has conventionally been considered a silicon wafer containing fewest defects, in spite of not forming an epitaxial layer. Therefore, it can be a wafer that is sufficiently adoptable for the latest extremely highly integrated devices or those expected to be produced in future.
In this case, 1.0xc3x97108 number/cm3 or more of BMDs may exist in a bulk portion of the aforementioned silicon wafer.
If such a sufficient amount of BMDs exist in the bulk portion of the silicon wafer as described above, the wafer can be a wafer having sufficient gettering effect in addition to the surface layer portion containing few defects.
Alternatively, the bulk portion of the aforementioned silicon wafer can be made to have 1.0xc3x97108 number/cm3 or more of BMDs by a heat treatment.
If such a sufficient amount of BMDs are precipitated in the bulk portion of the silicon wafer by a heat treatment as described above, impurities such as heavy metals in the wafer surface layer portion can be removed by a heat treatment. However, if the amount of BMD is too large, strength of the wafer may be degraded, and therefore the number is preferably 1xc3x971012 number/cm3 or less.
In this ease, the aforementioned heat treatment can be a heat treatment in the device production step.
If a device production heat treatment is also used as a gettering heat treatment without separately performing a gettering heat treatment as described above, the operation can be simplified and the gettering effect can be more easily obtained.
The present invention also provides a method for determining production conditions of a silicon single crystal, which comprises pulling one or more nitrogen-doped silicon single crystals by the Czochralski method while varying a ratio V/G of pulling rate V and temperature gradient G at a solid-liquid interfaces and/or a passage time PT for a temperature zone where grown-in defects agglomerate, producing silicon wafers from the silicon single crystal or crystals, subjecting the silicon wafers to a predetermined heat treatment, measuring a characteristic value of the silicon wafers to determine acceptability of the wafers based on a predetermined characteristic value, obtaining correlation between the acceptability and V/G and PT, and determining production conditions based on the correlation.
If the production conditions of single crystals are determined by pulling one or more nitrogen-doped silicon single crystals by the Czochralski method while varying V/G and/or PT, producing silicon wafers, and determining the production conditions according to the correlation between the acceptability based on the characteristic value of the silicon wafers after the heat treatment and V/G and PT as described above, there can be surely produced silicon single crystals that provide nitrogen-doped annealed wafers showing a low defect density even under severe examination conditions and little fluctuation thereof depending on the production condition.
Furthermore, if samples are obtained with various V/G and PT by using a suitable HZ (hot zone: internal structure of furnace in a CZ pulling apparatus) in the manner described above, it becomes sufficient to subsequently produce HZ only once, and single crystals containing extremely few grown-in defects can be surely obtained without producing HZ many times as the conventional practice. Thus, there is also obtained an advantage of reduced development cost.
In this case, the characteristic value of silicon wafers may be a grown-in defect density or electrical characteristic of the silicon wafer surface.
If the grown-in defect density or electrical characteristic of the silicon wafer surface is measured as the characteristic value of the silicon wafer and used as the standard for judgment of acceptability, silicon single crystals having a desired grown-in defect density or electrical characteristic can be stably produced by producing silicon single crystals with the production conditions determined based on the standard.
In this case, the measurement of the characteristic value of the silicon wafer can be performed after the silicon wafer surface undergone the aforementioned heat treatment is polished for a predetermined amount.
If the measurement of the characteristic value of the silicon water is performed after the silicon wafer surface undergone the heat treatment is polished for a predetermined amount as described above, a characteristic value at a position of a predetermined depth from the wafer surface can be easily evaluated, even when, for example, the measurement of the characteristic value is performed by using an apparatus that can measure grown-in defects only for the wafer surface.
In this case, when a nitrogen-doped silicon single crystal is pulled by the Czochralski method, nitrogen concentration and oxygen concentration in the silicon single crystal are preferably determined beforehand.
This is because the nitrogen concentration and oxygen concentration are parameters that closely relate to the BMD density, generation amount of Nxe2x80x94O donors etc., and hence in order to obtain desired values thereof, it is preferable to determine the nitrogen concentration and oxygen-concentration beforehand.
In this case, the nitrogen concentration and oxygen concentration can be determined based on the desired BMD density.
This is because the nitrogen-concentration and oxygen concentration are parameters that directly relate to the BMD density, and they are preferably adjusted to suitable levels, since unduly high oxygen concentration may cause problems such as large size of grown-in defects, while a higher oxygen concentration provides higher BMD density.
In this case, the aforementioned nitrogen concentration can be determined based on the desired generation amount of the Nxe2x80x94O donors.
This is because the nitrogen concentration is a value closely relating to the generation amount of the Nxe2x80x94O donors, and if too many Nxe2x80x94O donors are generated, a silicon single crystal of a desired resistivity may not be obtained.
In this case, when a silicon single crystal doped with nitrogen is pulled by the Czochralski method, it is preferably pulled under such conditions that at least the center of the crystal should become a V-rich region.
This is because, if an I-rich region and a V-rich region are intermingled in a plane of the wafer produced from the pulled crystal, it becomes difficult to eliminate the defects existing in the I-rich region such as the dislocation clusters by a heat treatment.
In this case, when a silicon single crystal doped with nitrogen is pulled by the Czochralski method, it is preferably pulled under such conditions that dislocation clusters are not generated over the entire plane for the radius direction of the pulled crystal.
This is because, in order to eliminate the defects that are difficult to be eliminated by a heat treatment such as dislocation clusters, which exist in the I-rich region, it is preferred that the crystal should be pulled under such conditions that dislocation clusters are not generated over the entire plane for the radius direction of the pulled crystal by controlling the pulling conditions such as V/G.
Furthermore, in the method for determining pulling conditions according to the present invention, the aforementioned change of PT can be attained by changing the pulling rate V during the pulling of silicon single crystal.
By using such a method, portions produced with various values of PT can be obtained in one silicon single crystal, and at least one type of HZ to be used is sufficient. Therefore, it is not required to design and produce various kinds of HZ for the confirmation.
In this case, it is preferable to perform a heat treatment at a temperature of 1150xc2x0 C. or higher for 1 hour or more as the aforementioned predetermined heat treatment.
This is because, if the silicon single crystal produced with the production conditions according to the present invention is subjected to a heat treatment at a temperature of at least 1150xc2x0 C. for 1 hour or more, a silicon wafer containing extremely few defects at a level that has never existed so far can be obtained.
The present invention also provides a method for producing a silicon wafer, which comprises producing a silicon single crystal using production conditions determined by the aforementioned method for determining production conditions of a silicon single crystal according to the present invention, and producing a silicon wafer from the silicon single crystal.
If a silicon wafer is produced by using a silicon single crystal that has been produced under conditions determined according to the present invention as described above, a silicon wafer containing extremely few defects at a level that has never been obtained so far can be stably obtained without fluctuation of their quality.
In this case, the produced silicon water is preferably subjected to a heat treatment, and it is more preferable to perform a heat treatment at a temperature of 1150xc2x0 C. or higher for 1 hour or more as the aforementioned heat treatment.
If the silicon wafer produced from a silicon single crystal that has been produced under conditions determined according to the present invention is subjected to a heat treatment, particularly preferably at a temperature of 1150xc2x0 C. or higher for 1 hour or more as described above, the silicon water can be surely made into a silicon wafer having the predetermined characteristic value.
As for the conditions for the heat treatment, it is preferably performed at a temperature of 1300xc2x0 C. or lower for 10 hours or less, if durability of heat treatment furnace, influence on wafer quality and cost are taken into consideration.
The present invention further provides a method for producing a silicon wafer comprising producing a silicon wafer from a silicon single crystal pulled by the Czochralski method with nitrogen doping and subjecting the silicon wafer to a heat treatment, wherein the silicon single crystal is pulled so that a ratio V/G of a pulling rate V of the single crystal and a temperature gradient G at solid-liquid interface, and a passage time PT for a temperature zone where grown-in defects agglomerate should be lower than a predetermined value of V/G and shorter than a predetermined time of PT, respectively, that are uniquely defined by predetermined nitrogen concentration and oxygen concentration in the silicon single crystal, conditions of heat treatment to which the silicon wafer is subjected, and grown-in defect density of the silicon wafer obtained after the heat treatment.
If the nitrogen concentration and oxygen concentration in the silicon single crystal, conditions of heat treatment to which the silicon wafer is subjected, and grown-in defect density of the silicon wafer obtained after the heat treatment are predetermined, and a silicon single crystal is pulled with V/G and PT respectively lower, and shorter than the values thereof uniquely defined by the above predetermined conditions as described above, a silicon wafer can be obtained with defects fewer than any conventional low defect wafers depending on its production conditions, and the silicon wafer show little quality fluctuation.
In this case, the aforementioned nitrogen concentration and oxygen concentration are preferably defined to be 1xc3x971013 to 2xc3x971014 number/cm3 and 12-18 ppma (JEIDA: Japan Electronic Industry Development Association standard), respectively, and the aforementioned heat treatment conditions are preferably represented as a heat treatment at 1200xc2x0 C. for 1 hour or more, or at 1150xc2x0 C. for 2 hours or more.
If the nitrogen concentration and the oxygen concentration of the silicon single crystal are selected to be within the aforementioned ranges, the problems caused by increase of grown-in defect size, generation of Nxe2x80x94O donors and so forth can be prevented, and if a silicon wafer produced in such a manner is subjected to a heat treatment at 1200xc2x0 C. for 1 hour or more, or at 1150xc2x0 C. for 2 hours or more, there can be produced a silicon wafer containing extremely few defects at a level never existed so far.
Since the wafer of the present invention contains extremely few defects, it can be used for the latest devices or devices to be produced in future, which are severely restricted as for defects, without causing degradation of device characteristics and yield reduction. Further, since the heat treatment conditions for reducing defects are similar to or less severe than those for the conventional annealed wafers, any costly process, such as argon annealing+ oxidation treatment, is not required. Further, by producing an SOI wafer utilizing the surface layer-portion of the wafer of the present invention, which contains extremely few defects, as an SOI (Silicon On Insulator) layer, it also becomes possible to produce devices of higher performance and function. Furthermore, according to the method of the present invention, various samples of V/G and passage time are obtained in a suitable HZ, and thus it is sufficient to subsequently produce HZ only once, In addition, single crystals and silicon wafers containing extremely few grown-in defects can be surely obtained.